SATA or PCI Express Communication
The existing SATA 3.0 specifications are limited to 6.0 Gbps bandwidth, which translates to roughly 750 MB/s. With overhead for the interface, the effective performance is restricted to 600 MB/s. Many current generations of solid-state drives have reached this limit and need some form of faster interface. The SATA 3.2 specification, of which SATA Express is a part, is a new communication standard between the computer and devices. It allows devices to choose the existing SATA method, ensuring backward compatibility with older devices, or use the faster PCI Express bus. The PCI Express bus is commonly used to communicate between the CPU and peripheral devices, such as graphics cards, networking interfaces, and USB ports. Under the current PCI Express 3.0 standards, a single PCI Express lane handles up to 1 GB/s, making it faster than the current SATA interface. Devices use more than one lane, however. According to the SATA Express specifications, a drive with the new interface can use two PCI Express lanes (often referred to as x2) to achieve a potential bandwidth of 2 GB/s. This interface makes the bandwidth nearly three times the speed of the previous SATA 3.0 hardware.
The New SATA Express Connector
The new interface requires a new connector. It combines two SATA data connectors with a third smaller connector, which deals with the PCI Express-based communications. The two SATA connectors are fully functional SATA 3.0 ports. A single SATA Express connector on a computer can support two older SATA ports. All SATA Express connectors use the full width, whether the drive is based on the earlier SATA communications or the newer PCI-Express. So, one SATA Express handles either two SATA drives or one SATA Express drive. Because a SATA Express-based drive can use either technology, it must interface with both, so it uses the two ports instead of a third, alternative, one. Also, many SATA ports link to a PCI Express lane to communicate with the processor. Using the PCI Express interface with a SATA Express drive turns off communication to the two SATA ports linked to that interface.
Command Interface Limitations
SATA communicates data between the device and the CPU. In addition to this layer, a command layer runs on top. The command layer sends the commands on what to write to and read from the storage drive. For years, this process was handled by the Advanced Host Controller Interface. It’s written into every operating system currently on the market, effectively making the SATA drives plug and play. No extra drivers are needed. While the technology worked well with older, slower technology such as hard drives and USB flash drives, it holds back faster SSDs. While the AHCI command queue can hold 32 commands, it can only process a single command at a time because there’s only a single queue. This is where the Non-Volatile Memory Express command set comes in. It features 65,536 command queues, each with the ability to hold 65,536 commands per queue. This allows for parallel processing of storage commands to the drive. This isn’t beneficial to a hard drive, as it’s limited to a single command because of the drive heads. However, for solid-state drives with multiple memory chips, it can boost bandwidth by writing several commands to different chips and cells simultaneously. This is new technology and isn’t built into most operating systems on the market. Many operating systems need additional drivers installed into the drives so that the drives can use the new NVMe technology. Deployment of the fastest performance for SATA Express drives may take some time. SATA Express supports either of the two methods. You can use the new technology with the AHCI drivers and potentially move to the newer NVMe standards later for improved performance, which may require the drive to be reformatted.
Other Features in the SATA 3.2 Specs
The new SATA specifications add more than the new communication methods and connectors. Most are targeted toward mobile computers but can benefit other non-mobile computers. The most notable power-saving feature is the DevSleep mode. It’s a new power mode that allows systems in the storage to quasi-hibernate. This mode reduces the power draw when in sleep mode to improve the running times of special laptops, including the Ultrabooks designed around SSDs and low power consumption. Solid-state hybrid drives also benefit from the new standards, as the standards added a new set of optimizations. In the current SATA implementations, the drive controller determines what items should and should not be cache based on what it sees bring requested. With the new structure, the operating system tells the drive controller which items it should hold in the cache, which reduces overhead on the drive controller and improves performance. Finally, there’s a function for uses with RAID drive setups. One purpose of RAID is for data redundancy. In the event of a drive failure, the drive is replaced, and the data is rebuilt from the checksum. A new process in the SATA 3.2 standards improves the rebuilding process by recognizing which data is damaged versus that which is not.
Implementation and Why It Didn’t Catch On Right Away
SATA Express has been an official standard since the end of 2013. It didn’t make its way into computer systems until the release of the Intel H97/Z97 chipsets in the spring of 2014. Even though motherboards featured the new interface, no drives at the time of launch used it. The reason the interface didn’t catch on quickly is the M.2 interface. It’s used exclusively for solid-state drives that use a smaller form factor. Magnetic-platter drives have a hard time exceeding the SATA standards. M.2 has more flexibility because it doesn’t rely on the larger drives. It can also use four PCI Express lanes, which means faster drives than the two lanes of SATA Express. AMD released its Ryzen microprocessors in early March 2017, bringing built-in support for SATA Express to the AMD Socket AM4 platform.
